Physical IP Development on FinFET - There's Nothing Planar About It!
To fully realize the advantages of FinFET devices, physical IP must follow the same trajectory that has benefited digital design. That includes scaling, lower power consumption and higher speeds. To achieve this, analog/mixed-signal development techniques and design styles have to be re-created and implemented with very close foundry cooperation. This session discusses the FinFET characteristics of physical IP design and how they differ from planar devices. It will describe the impact FinFETs have on existing circuit designs and layout topologies for widely used IP such as DDR, USB, PCI Express, embedded memories and logic libraries. In addition, this presentation will highlight the methodologies that incorporate advanced process qualification vehicles.